Timer 3 control register 1 (t3c) write, Timer 3 status register 1 (t3st) read, Timer 3 clock select register (t3cs) – Rainbow Electronics ATAR862-8 User Manual
Page 63: Atar862-8
63
ATAR862-8
4589B–4BMCU–02/03
Timer 3 Control Register 1
(T3C) Write
Primary register address: "C"hex - Write
Timer 3 Status Register 1
(T3ST) Read
Primary register address: "C"hex - Read
Note:
The status bits T3C1, T3C2 and T3ED will be reset after a READ access to T3ST.
Timer 3 Clock Select Register
(T3CS)
Address: "B"hex - Subaddress: "1"hex
Bit 3
Bit 2
Bit 1
Bit 0
Write
T3EIM
T3TOP
T3TS
T3R
Reset value: 0000b
T3EIM
T
imer
3 E
dge
I
nterrupt
M
ask
T3EIM = 0, disables the interrupt when an edge event for Timer 3 occurs (T3I)
T3EIM = 1, enables the interrupt when an edge event for Timer 3 occurs (T3I)
T3TOP
T
imer
3
T
oggle
O
utput
P
reset T3TOP = 0, sets toggle output (M3) to "0"
T3TOP = 1, sets toggle output (M3) to "1"
Note: If T3R = 1, no output preset is possible
T3TS
T
imer
3
T
oggle with
S
tart T3TS = 0, Timer 3 output is not toggled during the start
T3TS = 1, Timer 3 output is toggled if started with T3R
T3R
T
imer
3 R
un
T3R = 0, Timer 3 stop and reset
T3R = 1, Timer 3 run
Bit 3
Bit 2
Bit 1
Bit 0
Read
- - -
T3ED
T3C2
T3C1
Reset value: x000b
T3ED
T
imer
3 E
dge
D
etect
This bit will be set by the edge-detect logic of Timer 3 input (T3I)
T3C2
T
imer
3 C
ompare
2
This bit will be set when a match occurs between Counter 3 and T3CO2
T3C1
T
imer
3 C
ompare
1
This bit will be set when a match occurs between Counter 3 and T3CO1
Bit 3
Bit 2
Bit 1
Bit 0
T3CS
T3E1
T3E0
T3CS1
T3CS0
Reset value: 1111b
T3E1
T
imer
3 E
dge
select bit
1
T3E1
T3E0
Timer 3 Input Edge Select (T3I)
T3E0
T
imer
3 E
dge
select bit
0
1
1
–
1
0
Positive edge at T3I pin
0
1
Negative edge at T3I pin
0
0
Each edge at T3I pin