Rainbow Electronics ATAR862-8 - Manual (Page 59)

59
ATAR862-8
4589B–4BMCU–02/03
Timer 3 – Mode 7:
Carrier Frequency Burst
Modulation Controlled by SSI
Internal Output (SO) The Timer 3 counter is driven by an internal or external clock source. Its compare- and
compare mode registers must be programmed to generate the carrier frequency via the
output toggle flip-flop. The output (SO) of the SSI is used to enable or disable the Timer
3 output. The SSI should be supplied with the toggle signal of Timer 2 (see combination
mode 12).
Timer 3 – Mode 8:
FSK Modulation with Shift
Register Data (SO) The two compare registers are used for generating two different time intervals. The SSI
internal data output (SO) selects which compare register is used for the output fre-
quency generation. A "0" level at the SSI data output enables the compare register 1. A
"1" level enables compare register 2. The compare- and compare-mode registers must
be programmed to generate the two frequencies via the output toggle flip-flop. The SSI
can be supplied with the toggle signal of Timer 2. The Timer 3 counter is driven by an
internal or external clock source. The Timer 2 counter is driven by the Counter 3 (TOG3)
(see also combination mode 13).
Figure 58. FSK Modulation
Timer 3 – Mode 9:
Pulse-width Modulation with
the Shift Register The two compare registers are used for generating two different time intervals. The SSI
internal data output (SO) selects which compare register is used for the output pulse
generation. In this mode both compare- and compare-mode registers must be pro-
grammed for generating the two pulse widths. It is also useful to enable the single-action
mode for extreme duty cycles. Timer 2 is used as baudrate generator and for the trigger
restart of Timer 3. The SSI must be supplied with a toggle signal of Timer 2. The counter
is driven by an internal or external clock source (see combination mode 7).
Figure 59. Pulse-width Modulation
0 1 2 3 4 0 1 2 3 4 0 1 2 3
Counter 3
CM31
CM32
SO
4 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 3
T3R
4 0
T3O
1
0 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0
Counter 3
CM31
CM32
T3O
0 0 0 0 0 1 2 3 4 5 6 7 8 9 1011121314150 1 2 3 4 5
TOG2
6 7 8
1
9 1112 10 14 13 0 2 3 1 4 15 0
0 0 1
SIR
SO
SCO
T3R