4 phase correct pwm mode – Rainbow Electronics ATtiny43U User Manual
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in a constantly high or low output (depending on the polarity of the output set by the COMnA1:0
bits.)
A frequency (with 50% duty cycle) waveform output in fast PWM mode can be achieved by set-
ting OCnx to toggle its logical level on each Compare Match (COMnx1:0 = 1). The waveform
generated will have a maximum frequency of f
OCnx
= f
clk_I/O
/2 when OCRnA is set to zero. This
feature is similar to the OCnA toggle in CTC mode, except the double buffer feature of the Out-
put Compare unit is enabled in the fast PWM mode.
12.7.4
Phase Correct PWM Mode
The phase correct PWM mode (WGMn2:0 = 1 or 5) provides a high resolution phase correct
PWM waveform generation option. The phase correct PWM mode is based on a dual-slope
operation. The counter counts repeatedly from BOTTOM to TOP and then from TOP to BOT-
TOM. TOP is defined as 0xFF when WGMn2:0 = 1, and OCRnA when WGMn2:0 = 5. In non-
inverting Compare Output mode, the Output Compare (OCnx) is cleared on the Compare Match
between TCNTn and OCRnx while upcounting, and set on the Compare Match while down-
counting. In inverting Output Compare mode, the operation is inverted. The dual-slope operation
has lower maximum operation frequency than single slope operation. However, due to the sym-
metric feature of the dual-slope PWM modes, these modes are preferred for motor control
applications.
In phase correct PWM mode the counter is incremented until the counter value matches TOP.
When the counter reaches TOP, it changes the count direction. The TCNTn value will be equal
to TOP for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown
on
. The TCNTn value is in the timing diagram shown as a histogram for
illustrating the dual-slope operation. The diagram includes non-inverted and inverted PWM out-
puts. The small horizontal line marks on the TCNTn slopes represent Compare Matches
between OCRnx and TCNTn.
Figure 12-7. Phase Correct PWM Mode, Timing Diagram
TOVn Interrupt Flag Set
OCnx Interrupt Flag Set
1
2
3
TCNTn
Period
OCn
OCn
(COMnx1:0 = 2)
(COMnx1:0 = 3)
OCRnx Update