Texas Instruments TMS320C6202 - Manual (Page 38)

TMS320C6202
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS072B – AUGUST 1998 – REVISED AUGUST 1999
38
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251–1443
SYNCHRONOUS DRAM TIMING (CONTINUED)
CLKOUT2
CEx
BE[3:0]
EA[15:2]
ED[31:0]
SDA10
SDRAS/SSOE†
SDCAS/SSADS†
SDWE/SSWE†
BE1 BE2 BE3
CA1 CA2 CA3
D1 D2 D3
10 9
16 15
6
5
4
3
2 1
8
7
READ READ READ
† SDCAS/SSADS, SDRAS/SSOE, and SDWE/SSWE operate as SDCAS, SDRAS, and SDWE, respectively, during SDRAM accesses.
Figure 17. Three SDRAM READ Commands
CLKOUT2
CEx
BE[3:0]
EA[15:2]
ED[31:0]
SDA10
SDRAS/SSOE†
SDCAS/SSADS†
SDWE/SSWE†
BE1 BE2 BE3
CA1 CA2 CA3
D1 D2 D3
14 13
10 9
16 15
12
11
6
5
4
3
2
1
WRITE WRITE WRITE
† SDCAS/SSADS, SDRAS/SSOE, and SDWE/SSWE operate as SDCAS, SDRAS, and SDWE, respectively, during SDRAM accesses.
Figure 18. Three SDRAM WRT Commands
ADV
ANCE INFORMA
TION