Texas Instruments MSC1210 - Manual (Page 50)

SFR Definitions
3-14
MSINT (Milliseconds Interrupt, Address FA
H
): This SFR can be set to
cause an interrupt to occur after the specified number of milliseconds. This as-
sumes that the millisecond registers FC
H
and FD
H
are set to generate a cycle
every millisecond. The precise frequency at which MSINT will cause an inter-
rupt depends on the system clock and the value of the MSECH, MSECL, and
MSINT SFRs.
USEC (Microsecond Register, Address FB
H
): This SFR is divided into the
clock speed to determine the timing of 1ms. This value is used for program-
ming flash memory. The value in USEC, taken together with the low four bits
of FTCON, should produce a timing of 30
µ s to 40 µ s, which is used for flash
write operations.
MSECL/MSECH (Millisecond Low/High Registers, Addresses FC
H
/FD
H
):
These two SFRs, together, are used by the system to determine how long a
millisecond is. This value is used for erasing flash memory, millisecond interrupt,
second interrupt, and watchdog time. Although it is named Millisecond Low/High,
the clock speed and the value placed in these registers will determine the exact
length of time measured.
HMSEC (Hundred Millisecond Clock, Address FE
H
): This SFR is used to
create a 100ms clock based on the MSECL/MSECH SFRs. However, the ex-
act frequency generated by this SFR will depend on the system clock, the val-
ue of MSECL/MSECH, and the value placed in this register.
WDTCON (Watchdog Control, Address FF
H
): The WDTCON SFR is used
to enable, disable, and reset the watchdog timer. Once enabled, this SFR must
be periodically reset in order to prevent the system from resetting.