Texas Instruments MSC1210 - Manual (Page 174)

SPI Master Transfer in FIFO Mode using Interrupts
13-12
Line 11 enables the SPIRX and SPITX interrupts, after which the AI flag is
cleared and the EAI flag is enabled. There is no data to transmit, so SPITXIRQ
goes up and we go to the monitor_isr() routine. The SPITX IRQ went up, so
the subroutine send_4_bytes is called, where the program writes to the
SPIDATA register 4 times.
In line 20, the AI flag is cleared. The interrupt SPITX goes on again immediate-
ly because the interrupt is configured to be triggered when the number of bytes
to transmit is 4 or fewer. The number to bytes to transmit are 4, so the interrupt
is triggered and 4 additional bytes are subsequently written to the buffer.
Thus, the buffer is completely filled with bytes to be transmitted. As one byte
is transmitted, an additional byte is written. Once 4 bytes are transmitted, 4 by-
tes will be received, at which point both transmit and receive interrupts go high.
At that point the interrupt routine is executed, first reading the 4 received bytes
and then writing 4 more bytes to be transmitted. In this manner, the buffer is
always used to its fullest extent without overflowing in either direction.