Texas Instruments MSC1210 - Manual (Page 292)

8052 Instruction Set
E-8
CPL Complement Register
Syntax CPL operand
Instructions OpCode Bytes Cycles Flags
CPL A 0xF4 1 1 None
CPL C 0xB3 1 1 C
CPL bitAddr 0xB2 2 1 None
CPL complements operand, leaving the result in operand. If operand is a
single bit, the state of the bit is reversed. If operand is the accumulator, all the
bits in the accumulator are reversed. This can be thought of as accumulator
logical exclusive OR 255, or as 255-accumulator. If operand refers to a bit of
an output port, the value complemented is based on the last value written to
that bit, not the last value read from it.
See also: CLR, SETB
DA Decimal Adjust Accumulator
Syntax DA A
Instructions OpCode Bytes Cycles Flags
DA A 0xD4 1 1 C
DA adjusts the contents of the accumulator to correspond to a BCD (binary
coded decimal) number after two BCD numbers have been added by the ADD
or ADDC instruction.
If the carry bit is set or if the value of bits 0−3 exceed 9, 0x06 is added to the
accumulator. If the carry bit was set when the instruction began, or if 0x06 was
added to the accumulator in the first step, 0x60 is added to the accumulator.
The carry (C) bit is set if the resulting value is greater than 0x99. Otherwise,
it is cleared.
See also: ADD, ADDC