Texas Instruments MSC1210 - Manual (Page 250)

Summation/Shifter
17-22
This setting essentially causes the 32-bit accumulator to collect eight consecu-
tive data samples from the ADC. Upon completion, it divides the result by eight,
by implementing a 3-bit position arithmetic right shift. In other words, it com-
putes the average value of eight consecutive samples.
The following is the C code for the sample exercise described above:
#include ”MSC1210.H”
//unsigned char data irqen_init _at_ 0x7f ; // image of PAI
#define CONVERT 0
char converting, averaging;
void setport (void);
void init_accumulator ();
char init_a_to_d ();
long read_a_to_d_result ();
long read_accumulator_result ();
void init_accumulator ()
{
/*Clearing the SSCON register will always reset the concatenated string
of ACCR3:ACCR2:ACCR1:ACCR0 registers. This must be performed prior to
initiating a fresh set of A/D Conversion result accumulation*/
SSCON = 0x00;
/*Set Summation/Shifter for 8 A/D result accumulation and averaging*/
SSCON = 0xD2;
}
void setport (void)
{
P3DDRL &= 0xf0;
P3DDRL |= 0x07; //P30 input, P31 output
TF2 = CLEAR; T2 = CLEAR;
CKCON |= 0x20; // Set timer 2 to clk/4
RCAP2 = 0xffd9; //Set Timer 2 to Generate 57690 bps
//Initialize TH2:TL2 so that next clock generates first Baud Rate pulse
THL2=0xffff;
T2CON = 0x34; // Set T2 for Serial0 Tx/Rx baud generation
//SCON: Async mode 1, 8−bit UART, enable rcvr; TI=CLEAR, RI = CLEAR
SCON = 0x50;
PCON |= 0x80; // Set SMOD0 for 16X baud rate clock
}
long read_accumulator_result ()
{
/*Convert the concatenated Accumulate Result string ACCR3:ACCR2:ACCR1:ACCR0