Samsung FLEX-MUXONENAND KFN8GH6Q4M - Manual (Page 91)

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
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FLASH MEMORY
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
3.12.2 PI Block Load Operation
A PI Block Load Operation accesses the PI area and transfers identified content from the PI to the DataRAM on-chip buffer, thus making the
PI contents available to the Host.
The PI area is a separate part of the NAND Flash Array memory. It is accessed by issuing PI Access command(66h).
After being accessed with the PI Access Command, the contents of PI memory area are loaded using the same operations as a normal load
operation to the NAND Flash Array memory (see section 3.6 for more information).
To exit the PI access mode after an PI Block Load Operation, a Cold-, Warm-, Hot-, or NAND Flash Core Reset operation is performed.
PI Block Read Operation Flow Chart (In PI Block Access Mode)
NOTE :
1) FBA(NAND Flash Block Address) could be omitted or any address.
2) ‘Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1
3) BSA must be 1000.
Start
Wait for INT register
Add: F241h DQ[15]=INT
Write 0 to interrupt register 2)
Add: F241h DQ=0000h
Write ‘FPA, FSA’ of Flash
Add: F107h DQ=FPA, FSA
PI Reading completed
Write ‘Load’ Command
Add: F220h
DQ=0000h
Wait for INT register
low to high transition
Add: F241h DQ[15]=INT Write ‘PI Access’ Command
Add: F220h DQ=0066h
low to high transition
PI Exit
Host reads data from
DataRAM
Do Cold/Warm/Hot
/NAND Flash Core Reset
* DBS, DFS is for DDP
Write ‘DFS*, FBA’ of Flash 1)
Add:F100h DQ=DFS*, FBA
Write 0 to interrupt register 2)
Add: F241h DQ=0000h
Select DataRAM for DDP
Add: F101h DQ=DBS*
Write ‘BSA, BSC’ of DataRAM
Add: F200h DQ=BSA 3) , BSC
}
PI Block Access mode exit