Samsung FLEX-MUXONENAND KFN8GH6Q4M - Manual (Page 127)

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
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FLASH MEMORY
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
6.16 Warm Reset Timing
See AC Characteristics Table 5.6
NOTE :
1) The status which can accept any register based operation(Load, Program, Erase command, etc).
2) The status where reset is ongoing.
3) The status allows only BootRAM(BL1) read operation for Boot Sequence.(Refer to 7.2.2 Boot Sequence)
4) To read BL2 of Boot Sequence, Host should wait INT until becomes ready. and then, Host can issue load command.
(Refer to 7.2.2 Boot Sequence, 7.1 Methods of Determining Interrupt status)
CE, OE
RP
t RP
t Ready1
RDY
INT
High-Z High-Z
t Ready2
Idle 1)
Operation
Status
Reset Ongoing 2) BootRAM Access 3) Idle 1) INT Bit Polling 4)
bit