Samsung FLEX-MUXONENAND KFN8GH6Q4M - Manual (Page 43)

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
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FLASH MEMORY
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
2.8.18 Command Register F220h (R/W)
Command can be issued by two following methods, and user may select one way or the other to issue appropriate command;
1. Write command into Command Register when INT is at ready state. INT will automatically turn to busy state as command is issued. Once
the desired operation is completed, INT will go back ready state.
2. Write 0000h to INT bit of Interrupt Status Register, and then write command into Command Register. Once the desired operation is com-
pleted, INT will go back to ready state.
(00F0h and 00F3h may be accepted during busy state of some operations. Refer to the right most column of the command register table
below.)
F220h, default = 0000h
NOTE :
1) LSB page recovery Read command can always be issued but not in the PI Block access mode.
2) In PI Block Access mode, PI update can be issued.
3) ‘Reset Flex-MuxOneNAND’(=Hot reset) command makes the registers and NAND Flash core into default state.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Command
CMD Operation
Acceptable
command
during busy
0000h Load a page unit into buffer 00F0h, 00F3h
0003h Superload a page unit from buffer 00F0h, 00F3h
0005h
LSB page recovery Read 1)
PI update 2)
00F0h, 00F3h
0080h
Program a page unit from buffer &
Finish Program operation at Cache Program operation
00F0h, 00F3h
007Fh Cache Program operation 00F0h, 00F3h
0023h Unlock NAND array a block 00F0h, 00F3h
002Ah Lock NAND array a block 00F0h, 00F3h
002Ch Lock-tight NAND array a block 00F0h, 00F3h
0027h All Block Unlock 00F0h, 00F3h
0094h Block Erase 00F0h, 00F3h
00B0h Erase Suspend 00F0h, 00F3h
0030h Erase Resume 00F0h, 00F3h
00F0h Reset NAND Flash Core -
00F3h Reset Flex-MuxOneNAND 3) -
0065h OTP Access 00F0h, 00F3h
0066h Access to Partition Information(PI) Block 00F0h, 00F3h