Samsung FLEX-MUXONENAND KFN8GH6Q4M - Manual (Page 123)

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
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FLASH MEMORY
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
6.12 Cache Program Operation Timing
See AC Characteristics Table 5.7 and Table 5.9
1st
d
a
ta
inpu
t
2nd dat
a input
Address S
e
tting
ca
che pr
ogra
m
Command
AD
Q
0
~
A1, A2, A3
: A
d
dress o
f Dat
aRAM to
be written
IN
T:
Ind
icator fo
r Dat
a
RAM’
s S
tatus (
R
eady=High,
B
u
sy=Low)
Ongoing S
tatus : Indicated
by OnGo bit in
Controller S
tatus Register
[15] (
F
240h)
4KB dat
a inp
ut : Asynch W
rite / Synch W
rite a
vaila
ble.
C
ommand input and IN
T pin behavio
r is based on
‘INT
auto mode
’.
In
‘INT
manual mode’, writing ‘0
’ to inter
rupt
r
egister
is requ
ire
d before
comman
d issue.
AD
Q
1
5
A1
A2
High-Z
INT
.
...
.
.
.
.
4KB dat
a into
2 Dat
aRAMs
4KB dat
a into
2 D
at
aRAMs
Cache prog
ram Comma
nd
pr
ogram C
ommand
3nd dat
a
input
A3
4
K
B da
ta
in
to
2
Dat
aRAMs
.
..
Ongoin
g
St
at
u
s
Contro
ller S
tatus Regist
er Check
cur
rent : I
nval
id
previo
us: Pass=
0
, Fail=1
Contr
oller
S
tatu
s Reg
ister C
heck
curre
nt : Pass=0, F
ail=1
pre
vious: Pass=0, Fail=
1
Contr
oller S
tatus Register Ch
eck
cu
rren
t : Inva
lid (F
ixed to 0)
previous:
Invalid (F
ixed to 0)