Freescale Semiconductor 56F8122 User Manual
Page 44
56F8322 Techncial Data, Rev. 10.0
44
Freescale Semiconductor
Preliminary
Table 4-16 Serial Communication Interface 1 Registers Address Map
(SCI1_BASE = $00 F290)
Register Acronym
Address Offset
Register Description
SCI1_SCIBR
$0
Baud Rate Register
SCI1_SCICR
$1
Control Register
Reserved
SCI1_SCISR
$3
Status Register
SCI1_SCIDR
$4
Data Register
Table 4-17 Serial Peripheral Interface 0 Registers Address Map
(SPI0_BASE = $00 F2A0)
Register Acronym
Address Offset
Register Description
SPI0_SPSCR
$0
Status and Control Register
SPI0_SPDSR
$1
Data Size Register
SPI0_SPDRR
$2
Data Receive Register
SPI0_SPDTR
$3
Data Transmitter Register
Table 4-18 Serial Peripheral Interface 1 Registers Address Map
(SPI1_BASE = $00 F2B0)
Register Acronym
Address Offset
Register Description
SPI1_SPSCR
$0
Status and Control Register
SPI1_SPDSR
$1
Data Size Register
SPI1_SPDRR
$2
Data Receive Register
SPI1_SPDTR
$3
Data Transmitter Register
Table 4-19 Computer Operating Properly Registers Address Map
(COP_BASE = $00 F2C0)
Register Acronym
Address Offset
Register Description
COPCTL
$0
Control Register
COPTO
$1
Time-Out Register
COPCTR
$2
Counter Register