4 gpiob1 (b1)—bit 5, 5 gpiob0 (b0)—bit 4, 6 gpioa5 (a5)—bit 3 – Freescale Semiconductor 56F8122 User Manual
Page 87: 7 gpioa4 (a4)—bit 2, 8 gpioa3 (a3)—bit 1, 9 gpioa2 (a2)—bit 0, 9 peripheral clock enable register (sim_pce), This bit selects the alternate function for gpiob1, This bit selects the alternate function for gpiob0, This bit selects the alternate function for gpioa5
4 gpiob1 (b1)—bit 5, 5 gpiob0 (b0)—bit 4, 6 gpioa5 (a5)—bit 3 | 7 gpioa4 (a4)—bit 2, 8 gpioa3 (a3)—bit 1, 9 gpioa2 (a2)—bit 0, 9 peripheral clock enable register (sim_pce), This bit selects the alternate function for gpiob1, This bit selects the alternate function for gpiob0, This bit selects the alternate function for gpioa5 | Freescale Semiconductor 56F8122 User Manual | Page 87 / 137 This manual is related to the following products: