BECKHOFF EtherCAT IP Core for Altera FPGAs v3.0.10 - Manual (Page 42)

IP Core Installation
III-30 Slave Controller – IP Core for Altera FPGAs
3.6 Integrating the EtherCAT IP Core into the Altera Designflow
Quartus II expects all IP cores to be installed into
\ip\
This can be done by the windows setup program automatically if it recognizes the Quartus II
installations on the disk. The EtherCAT IP core can also be integrated into Quartus II installations
manually by copying the contents of the
\quartus_add\
folder to the Quartus installation folder.
3.6.1 Software Templates for example designs with NIOS processor
Software example templates are available for example designs with NIOS processor. The templates
are part of the quartus_add folder, they will be copied to your NIOS II installation folder.
Source folder:
\quartus_add\nios2eds\examples\software
Destination folder:
\nios2eds\examples\software
The NIOS demo applications are not suitable for production, they cannot be certified. Use the
EtherCAT Slave Stack Code (SSC, available from the ETG) for products.
3.7 EtherCAT Slave Information (ESI) / XML device description for example designs
If you want to use the example designs, add the ESI to your EtherCAT master/EtherCAT configuration
tool/network configurator.
The ESI is located at
\example_designs\EtherCAT_Device_Description\BECKHOFF ET1810.xml
If you are using TwinCAT, add the ESI to the appropriate folder of your TwinCAT installation before
the System Manager is started:

TwinCAT 2: \Io\EtherCAT

TwinCAT 3: \\Config\Io\EtherCAT