Artesyn MVME3100 Single Board Computer Installation and Use (June 2014) - Manual (Page 129)

Programming Details
MVME3100 Single Board Computer Installation and Use (6806800M28E) 129
6. Meets 0.7 ns hold time requirement.
7. Local bus LAD[0:31] is sampled during POR, but only LAD[28:31] are configurable by
resistor option. Software can use this value to inform the firmware or operating system
about initial board configuration.
8. ECC signals from memory devices must be disconnected.
7.3 MPC8540 Interrupt Controller
The MVME3100 uses the MPC8540 integrated programmable interrupt controller (PIC) to
manage locally generated interrupts. Currently defined external interrupting devices and
interrupt assignments, along with corresponding edge/levels and polarities, are shown in the
following table.
Table 7-2 MPC8540 Interrupt Controller
Interrupt # Edge/Level Polarity Interrupt Source Notes
0 Level Low VME0
1 Level Low VME1/External Timers
1
2 Level Low VME2/sATA
3 Level Low VME3/UARTs (OR'd)
2
4 Level Low PMCSpan/PMCs/USB
5 Level Low PMCspan/PMCs
6 Level Low PMCspan/PMCs
7 Level Low PMCspan/PMCs
8 Level Low ABORT
9 Level Low Temp Sensor
10 Level Low Ethernet PHYs (OR'd)
11 Level Low DS1375 Alarm Interrupt
1. External timers are implemented in a PLD.
2. External UARTs are implemented using a QUART.