S, you can either use the – Altera DDR Timing Wizard User Manual
Page 78
See also other documents in the category Altera Measuring instruments:
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- Unique Chip ID (12 pages)
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- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
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- Integer Arithmetic IP (157 pages)
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- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
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- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
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- Phase-Locked Loop Reconfiguration IP Core (51 pages)
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