Cirrus Logic CS42L51 - Manual (Page 70)

70 DS679F1
CS42L51
6.22 Limiter Attack Rate Register (Address 1Bh)
Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.
Limiter Attack Rate (ARATE[5:0])
Default: 000000
Function:
Sets the rate at which the limiter attenuates the analog output from levels above the maximum setting in the
limiter threshold register.
The limiter attack rate is user-selectable but is also a function of the sampling frequency, Fs, and the
DAC_SZC setting unless the disable bit is enabled.
6.23 ALC Enable & Attack Rate (Address 1Ch)
ALC Enable (ALC_ENX)
Default: 0
0 - Disabled
1 - Enabled
Function:
Enables automatic level control for ADC channel x.
Note: When the ALC is enabled, the Attenuator and PGA volume is automatically controlled and should
not be adjusted manually.
ALC Attack Rate (ARATE[5:0])
Default: 000000
Function:
Sets the rate at which the ALC attenuates the analog input from levels above the maximum setting in the
ALC threshold register.
The limiter attack rate is user-selectable but is also a function of the sampling frequency, Fs, and the SOFTx
& ZCROSSx bit settings unless the disable bit for each function is enabled.
7 6 5 4 3 2 1 0
Reserved Reserved ARATE5 ARATE4 ARATE3 ARATE2 ARATE1 ARATE0
Binary Code Attack Time
000000 Fastest Attack
··· ···
111111 Slowest Attack
7 6 5 4 3 2 1 0
ALC_ENB ALC_ENA ALC_ARATE5 ALC_ARATE4 ALC_ARATE3 ALC_ARATE2 ALC_ARATE1 ALC_ARATE0
Binary Code Attack Time
000000 Fastest Attack
··· ···
111111 Slowest Attack