Cirrus Logic CS42L51 - Manual (Page 19)

DS679F1 19
CS42L51
HEADPHONE OUTPUT POWER CHARACTERISTICS
Test conditions (unless otherwise specified): Input test signal is a full-scale 997 Hz sine wave; measurement band-
width is 10 Hz to 20 kHz; Sample Frequency = 48 kHz; test load R
L
= 16
Ω, C
L
= 10 pF (see Figure 3 ).
8. One-half LSB of triangular PDF dither is added to data.
9. Full-scale output voltage and power is determined by the gain setting, G, in register “Headphone Analog
Gain (HP_GAIN[2:0])” on page 57 . High gain settings at certain VA and VA_HP supply levels may
cause clipping when the audio signal approaches full-scale, maximum power output, as shown in
Figures 27 - 30 on page 76 .
10. See Figure 3 . R
L
and C
L
reflect the recommended minimum resistance and maximum capacitance re-
quired for the internal op-amp's stability and signal integrity. In this circuit topology, C
L
will effectively
move the band-limiting pole of the amp in the output stage. Increasing this value beyond the recom-
mended 150 pF can cause the internal op-amp to become unstable.
11. VA_HP settings lower than VA reduces the headroom of the headphone amplifier. As a result, the DAC
may not achieve the full THD+N performance at full-scale output voltage and power.
Parameter
VA = 2.5V (nominal)
Min Typ Max
VA = 1.8V (nominal)
Min Typ Max Unit
AOUTx Power Into R
L
= 16
Ω
HP_GAIN[2:0]
Analog
Gain (G)
VA_HP
000 0.3959
1.8 V - 14 - - 7 - mW
rms
2.5 V - 14 - - 7 - mW
rms
001 0.4571
1.8 V - 19 - - 10 - mW
rms
2.5 V - 19 - - 10 - mW
rms
010 0.5111
1.8 V - 23 - - 12 - mW
rms
2.5 V - 23 - - 12 - mW
rms
011 (default) 0.6047
1.8 V (Note 11) - 17 - mW
rms
2.5 V - 32 - - 17 - mW
rms
100 0.7099
1.8 V (Note 11) - 23 - mW
rms
2.5 V - 44 - - 23 - mW
rms
101 0.8399
1.8 V (Note 9) mW
rms
2.5 V - 32 - mW
rms
110 1.0000
1.8 V
(Note 9 , 11 )
mW
rms
2.5 V mW
rms
111 1.1430
1.8 V mW
rms
2.5 V mW
rms
AOUTx
AGND
R
L
C
L 0.022 µF
51 Ω
Figure 3. Headphone Output Test Load