Cirrus Logic CS42L51 - Manual (Page 67)

DS679F1 67
CS42L51
6.19 PCM Channel Mixer (Address 18h)
Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.
Channel Mixer (PCMx[1:0] & ADCx[1:0])
Default: 00
Function:
Implements mono mixes of the left and right channels as well as a left/right channel swap.
6.20 Limiter Threshold SZC Disable (Address 19h)
Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.
Maximum Threshold (MAX[2:0])
Default: 000
Function:
Sets the maximum level, below full scale, at which to limit and attenuate the output signal at the attack rate.
Bass, Treble and digital gain settings that boost the signal beyond the maximum threshold may trigger an
attack.
7 6 5 4 3 2 1 0
PCMA1 PCMA0 PCMB1 PCMB0 ADCA1 ADCA0 ADCB1 ADCB0
PCMA[1:0]
and/or
ADCA[1:0]
AOUTA PCMB[1:0] and/or
ADCB[1:0]
AOUTB
00 L 00 R
01 01
10 10
11 R 11 L
7 6 5 4 3 2 1 0
MAX2 MAX1 MAX0 CUSH2 CUSH1 CUSH0 LIM_SRDIS LIM_ZCDIS
MAX[2:0] Threshold
Setting
(dB)
000 0
001 -3
010 -6
011 -9
101 -12
101 -18
110 -24
111 -30
L R +
2
------------
L R +
2
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