Delay and phase in triggered measurements – Agilent Technologies VXI E1439 User Manual
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Using the Agilent E1439
Delay and phase in triggered measurements
Delay and phase in triggered measurements
It is important to note that the trigger delay is specified in terms of output samples. When using
the digital filters within the E1439 to reduce the sample rate, there are multiple ADC samples
corresponding to each output sample. In order to determine the relationship between the first
output sample of a block and the actual ADC sample where the trigger occurred, you must read
the actual delay from the module using age1439_trigger_delay_actual_get.
This relationship varies from block to block and is a function of the particular value of counters
within the digital filters at the time the trigger occurs. Thus the actual delay from the trigger event
is the delay from age1439_trigger_delay_get multiplied by 2
sigBw
(from age1439_filter_bw_get
if filter decimation is used, or 2
(sigBw-1)
if filter decimation is off). From this value, subtract the
value returned by age1439_trigger_delay_actual_get. The result is in periods of the ADC
sample clock. Special considerations apply in multi-module systems.
multi-module systems” on page 40
.
When doing a zoomed measurement, it may also be helpful to know the phase of the digital LO at
the time the trigger occurred, since the LO is also running continuously and it has an arbitrary
phase relationship with the trigger event. age1439_trigger_phase_actual_get returns the phase
of the LO at the trigger point. The LO phase could be used in time domain averaging of blocks, or
other operations involving zoomed blocks of data, so that the varying phase of the LO can be
removed from the calculation.
The trigger_delay value is the time, measured in output samples, from the desired trigger point to
the start of the time record. The trigger_delay_actual value is the time, measured in input
samples, from the desired trigger point to the actual trigger point.
The following example illustrates how trigger_delay and trigger_delay_actual can be
combined. In this example:
filter_bw=4 (2.4 MHz span)
filter_decimate = 1 (on)
Start of
time record
Desired
trigger point
Actual
trigger point
signal
time
trigger_delay trigger_delay_
actual