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3 nesting, 9 instruction memory and execution time – Campbell Scientific CR7 Measurement and Control System User Manual

Page 48

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SECTION 3. INSTRUCTION SET BASICS

3-6

Subroutines can be called from other
subroutines; they cannot be embedded within
other subroutines. A subroutine must end
before another subroutine begins (Error 20).
Any loops or IF...THEN DO sequences started
within a subroutine must end before the
subroutine.

3.8.3 NESTING

A branching or loop instruction which occurs
before a previous branch or loop has been
closed with the END instruction is nested. The
maximum nesting level is 9 deep. Error 30 is
displayed when attempting to compile a
program which is nested too deep.

The Loop Instruction, 87, counts as 1 level.
Instructions 86, 88, 89, 91, and 92 each count
as one level when used with the THEN DO
command 30. Use of Else, Instruction 94, also
counts as one nesting level each time it is used.
For example, the AND construction above is
nested 2 deep while the OR construction is
nested 3 deep. Branching and loop nesting

starts at zero within each subroutine and then
returns to the previous level after returning from
the subroutine.

Subroutine calls do not count as nesting with the
above instructions. They have a separate nesting
limit of seven (Instruction 85, Section 12).

Any number of groups of nested instructions
may be used in any of the three Programming
Tables. The number of groups is only restricted
by the program memory available.

3.9 INSTRUCTION MEMORY AND

EXECUTION TIME

The standard CR7 has 1744 bytes of program
memory available for the programs entered in
the *1, *2, and *3 program tables. Each
instruction also makes use of varying numbers
of Input, Intermediate, and Final Storage
locations. The following tables list the memory
used by each instruction and the approximate
time required to execute the instruction.

TABLE 3.9-1. Input/Output Instruction Memory

R = No. of Reps.
D = Delay

INSTRUCTION

MEMORY

EXECUTION TIME (ms)

INPUT

PROG.

Slow or No

Fast

LOC.

BYTES

Integration

Integration

1 VOLT (SE)

R

15

57.4

+

22R

16

+

2.9R

2 VOLT (DIFF)

R

15

54

+

43.4R

19

+

4.7R

3 PULSE

R

15

4

+

2R

4 EX-DEL-SE

R

20

56.8

+ (22.6 + D)R

23.4

+ (3.3 + D)R

5 AC HALF BR

R

18

57.7

+

44R

21.1

+

5.5R

6 FULL BR

R

18

58

+

87.3R

24.2

+

9.6R

7 3W HALF BR

R

18

58.8

+

88.7R

24.3

+ 11.7R

9 FULL BR-MEX

R

19

104

+ 175R

31.5

+ 20.4R

10 BATT. VOLT

1

4

22.6

11 TEMP (107)

R

15

23

+

5.4R

12 RH (207)

R

17

23.3

+

5.4R

13 TEMP-TC SE

R

18

59.8

+

21.9R

25.2

+

6.1R

14 TEMP-TC DIF

R

18

61

+

43.2R

21.5

+

7.85R

16 TEMP-RTD

R

15

0.4

+

2.7R

17 TEMP-INTERNL

1

4

116.2

18 TIME

1

7

1.4

19 SIGNATURE

1

4

607.2

20 PORT SET

1

4

2.9

21 ANALOG OUT

1

5

3.6

22 EXCIT-DEL

1

11

10.8

+

D

23 SELECT I/O MODULE

0.4

26 TIMER

1 or 0

4

0.54 to reset, 0.25 to load into location