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14 ac97 audio interface signals – AMD Geode SC3200 User Manual

Page 63

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AMD Geode™ SC3200 Processor Data Book

63

Signal Definitions

32581C

3.4.14

AC97 Audio Interface Signals

Signal Name

Ball No.

Type

Description

Mux

BIT_CLK

U30

I

Audio Bit Clock. The serial bit clock from the codec.

Note:

If selected as BIT_CLK function but not used, tie
BIT_CLK low.

F_TRDY#

SDATA_OUT

P29

O

Serial Data Output. This output transmits audio serial
data to the codec.

TFT_PRSNT (Strap)

SDATA_IN

U31

I

Serial Data Input. This input receives serial data from
the primary codec.

Note:

If selected as SDATA_IN function but not used,
tie SDATA_IN low.

F_GNT0#

SDATA_IN2

AL8

I

Serial Data Input 2. This input receives serial data from
the secondary codec. This signal has wakeup capability.

---

SYNC

P30

O

Serial Bus Synchronization. This bit is asserted to syn-
chronize the transfer of data between the SC3200 and
the AC97 codec.

CLKSEL3 (Strap)

AC97_CLK

P31

O

Codec Clock. It is twice the frequency of the Audio Bit
Clock.

---

AC97_RST#

U29

O

Codec Reset. S3 to S5 wakeup is not supported
because AC97_RST# is powered by V

IO

. If wakeup from

states S3 to S5 are needed, a circuit in the system board
should be used to reset the AC97 codec.

F_STOP#

PC_BEEP

V31

O

PC Beep. Legacy PC/AT speaker output.

GPIO16+

F_DEVSEL#