AMD Geode SC3200 User Manual
Page 176
176
AMD Geode™ SC3200 Processor Data Book
Core Logic Module - Register Summary
32581C
B8h
8
RO
DMA Shadow Register
xxh
B9h
8
RO
PIC Shadow Register
xxh
BAh
8
RO
PIT Shadow Register
xxh
BBh
8
RO
RTC Index Shadow Register
xxh
BCh
8
R/W
Clock Stop Control Register
00h
BDh-BFh
---
---
Reserved
00h
C0h-C3h
32
R/W
User Defined Device 1 Base Address Register
00000000h
C4h-C7h
32
R/W
User Defined Device 2 Base Address Register
00000000h
C8h-CBh
32
R/W
User Defined Device 3 Base Address Register
00000000h
CCh
8
R/W
User Defined Device 1 Control Register
00h
CDh
8
R/W
User Defined Device 2 Control Register
00h
CEh
8
R/W
User Defined Device 3 Control Register
00h
CFh
---
---
Reserved
00h
D0h
8
WO
Software SMI Register
00h
D1h-EBh
16
---
Reserved
00h
ECh
8
R/W
Timer Test Register
00h
EDh-F3h
---
---
Reserved
00h
F4h
8
RC
Second Level PME/SMI Status Register 1
00h
F5h
8
RC
Second Level PME/SMI Status Register 2
00h
F6h
8
RC
Second Level PME/SMI Status Register 3
00h
F7h
8
RC
Second Level PME/SMI Status Register 4
00h
F8h-FFh
---
---
Reserved
00h
Table 6-14. F0: PCI Header/Bridge Configuration Registers
for GPIO and LPC Support Summary (Continued)
F0 Index
Width
(Bits)
Type
Name
Reset
Value
Reference
(Table 6-29)