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Figure 9-17, Input timing measurement conditions, Figure 9-18 – AMD Geode SC3200 User Manual

Page 376: Pci reset timing, Figure 9-18)

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376

AMD Geode™ SC3200 Processor Data Book

Electrical Specifications

32581C

Figure 9-17. Input Timing Measurement Conditions

Figure 9-18. PCI Reset Timing

V

TEST

V

TEST

Input Valid

t

SU

t

H

V

TEST

V

MAX

V

TH

V

TL

PCICLK

Input

V

TH

V

TL

) (

100 ms (typ)

) (

t

RST

t

RST-CLK

t

RST-OFF

TRI_STATE

PCI

Signals

PCIRST#

PCICLK

POWER

POR#

t

FAIL

V

IO

Note:

The value of t

FAIL

is 500 ns (maximum) from the power rail which exceeds specified tolerance by more than

500 mV.