KEPCO EL Series Electronic Load Operator Manual P/N 243-1295 Firmware Version 3.22 through 3.41 - Manual (Page 70)

B-10
SERIES EL 062011
B.61 [SOURce:]VOLTage:PROTection:UNDer:STATE[:LEVel] COMMAND
VOLT:PROT:UND:STAT
Syntax: Short Form: [SOUR:]VOLT:PROT:UND:STAT[:LEV]
Long Form: [SOURce:]VOLTage:PROTection:UNDer:STATe[:LEVel]
where = 1 (enabled) or 0 (disabled)
Description: Enables (1) or disables (0) the undervoltage protection level set using VOLT:PROT:UND. This
command saves having to change the protection level to some value outside of the operating range.
B.62 [SOURce:]VOLTage:PROTection:UNDer:STATE[:LEVel]? QUERY
VOLT:PROT:UND:STAT?
Syntax: Short Form: [SOUR:]VOLT:PROT:UND:STAT[:LEV]?
Long Form: [SOURce:]VOLTage:PROTection:UNDer:STATe[:LEVel]?
Returns: = 1 (enabled) or 0 (disabled)
Description: Indicates whether the undervoltage protection level set using VOLT:PROT:UND is enabled (1)
or disabled (0).
B.63 STATus:CHANnel[:EVENt]? QUERY
STAT:CHAN?
Syntax: Short Form: STAT:CHAN[:EVEN]? Long Form: STATus:CHANnel[:EVENt]?
Returns: <16 bits> = the value of the Channel event register.
Description: Returns value of Channel event register. Each PFM within a chassis has three Channel registers
associated with it. Bits in the Event register are set whenever the associated condition occurs, and are
cleared only upon an explicit command, thus latching any conditions that occur. See Table B-2 for bit
assignments.
B.64 STATus:CHANnel:CONDition COMMAND
STAT:CHAN:COND
Syntax: Short Form: STAT:CHAN:COND 0 Long Form: STATus:CHANnel:CONDition 0
Description: Resets the Channel Enable Register bits to zero.
B.65 STATus:CHANnel:CONDition? QUERY
STAT:CHAN:COND?
Syntax: Short Form: STAT:CHAN:COND? Long Form: STATus:CHANnel:CONDition?
Returns: <16 bits> = the value of the Channel condition register.
Description: Returns the value of the Channel Condition Register. Each PFM within a chassis has three Chan-
nel registers associated with it. The Condition register reflects the instantaneous state of that PFM.
Bits in the Event register are set whenever the associated condition occurs, and are cleared only upon
an STAT:CHAN:COND 0 command, thus latching any conditions that occur. See Table B-2 for bit
assignments.
B.66 STATus:CHANnel:ENABle COMMAND
STAT:CHAN:ENAB
Syntax: Short Form: STAT:CHAN:ENAB Long Form: STATus:CHANnel:ENABle
Where = 16 bits = the value of the Channel enable register.
Description: Sets the Channel Enable Register to determine which bits are allowed to set the channel event
register. Each PFM within a chassis has three Channel registers associated with it. The Enable regis-
ter selects which of the latched bits in the Event register can propagate to higher-level indicators. See
Table B-2 for bit assignments.
TABLE B-2. CHANNEL STATUS CONDITION,
ENABLE, AND EVENT REGISTER BITS
CONDITION NU PS OV NU OT OP NU OC VF
BIT 14-15 13 12 5 - 11 4 3 2 1 0
VALUE
16384-
32768
8192 4096 32-2048 16 8 4 2 1
NU - NOT USED
OC OVERCURRENT
OP OVERPOWER
OT OVERTEMPERATURE
OV OVERVOLTAGE
PS PROTECTION SHUTDOWN
VF VOLTAGE FAULT