Rainbow Electronics MAX1386 - Manual (Page 36)

MAX1385/MAX1386
Dual RF LDMOS Bias Controllers
with I
2 C/SPI Interface
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Coarse DAC1 Low Wiper Output and Input registers to
their POR states. Set FINECL2 to 1 to reset Fine DAC2
Output and Input registers to their POR states.
THRUHI1 and THRUHI2 (Read/Write)
Write to the Coarse DAC1/DAC2 Write-Through High
Wiper Input register by sending the appropriate write
command byte followed by data bits D15–D0 (see
Table 20). Bits D15–D8 are don’t care. Writing to one of
these registers automatically writes through to the
appropriate DAC output register, thereby updating the
DAC output immediately. Writing to one of these regis-
ters does not trigger automatic high wiper calibration.
Read the Coarse DAC1/DAC2 Write-Through High
Wiper Input register by sending the appropriate read
command byte.
THRULO1/THRULO2 (Read/Write)
Write to the Coarse DAC1/DAC2 Write-Through Low
Wiper Input register by sending the appropriate write
command byte followed by data bits D15–D0 (see
Table 21). Bits D15–D8 are don’t care. Writing to one of
these registers automatically writes through to the
appropriate DAC output register, thereby updating the
DAC output immediately. Writing to one of these regis-
ters does not trigger automatic low wiper calibration.
Read the Coarse DAC1/DAC2 Write-Through Low
BIT NAME DATA BIT POR FUNCTION
X D15–D8 X Don’t care
FULLPD D7 1
1 = Shut down all internal blocks
0 = Do not shut down all internal blocks
X D6, D5, D4 X Don’t care
FBGON D3 0
1 = Force internal bandgap reference to be powered always
0 = Let the ADC control power-down of the internal reference
OSCPD D2 0
1 = Shut down the internal oscillator
0 = Do not shut down the internal oscillator
DAC2PD D1 1
1 = Power down DAC2
0 = Do not power down DAC2
DAC1PD D0 1
1 = Power down DAC1
0 = Do not power down DAC1
Table 17. SSHUT (Write)
BIT NAME DATA BIT POR FUNCTION
X D15–D6 X Don’t care
FINECH2 D5 N/A
1 = Update fine DAC2 with FINE2 or FINECAL2
0 = Do not update DAC2
HIGHCH2 D4 N/A
1 = Update coarse DAC2 with HIWIPE2
0 = Do not update DAC2
LOWCH2 D3 N/A
1 = Update coarse DAC2 with LOWIPE2
0 = Do not update DAC2
FINECH1 D2 N/A
1 = Update fine DAC1 with FINE1 or FINECAL1
0 = Do not update DAC1
HIGHCH1 D1 N/A
1 = Update coarse DAC1 with HIWIPE1
0 = Do not update DAC1
LOWCH1 D0 N/A
1 = Update coarse DAC1 with LOWIPE1
0 = Do not update DAC1
Table 18. LDAC (Write)