Xilinx 1000BASE-X - Manual (Page 86)

86 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1
UG155 March 24, 2008
Chapter 7: 1000BASE-X with RocketIO Transceivers R
Figure 7-4: 1000BASE-X Connection to Virtex-5 GTX Transceivers
Ethernet 1000BASE-X
PCS/PMA or SGMII
LogiCORE
Virtex-5
GTP
RocketIO
(0)
TXUSRCLK0
TXUSRCLK20
RXUSRCLK0
RXUSRCLK20
userclk
userclk2
rxbufstatus[1:0]
rxchariscomma
rxcharisk
rxclkcorcnt[2:0]
rxdata[7:0]
rxrundisp
powerdown
txchardispmode
txchardispval
txcharisk
txdata[7:0]
enablealign
RXBUFERR0
RXCHARISCOMMA0
RXCHARISK0
RXCLKCORCNT[2:0]
RXDATA[07:0]
RXRUNDISP0
POWERDOWN0
TXCHARDISPMODE0
TXCHARDISPVAL0
TXCHARISK0
TXDATA[07:0]
RXENMCOMMAALIGN0
RXENPCOMMAALIGN0
RXDISPERR0 rxdisperr
LOGIC
SHIM
CLKIN
REFCLKOUT
component_name_block
(Block Level from
example design)
clkin
(125MHz)
IBUFGDS
IPAD
brefclkp
IPAD
brefclkn
rocketio_wrapper_gtp_tile
rocketio_wrapper_gtp
userclk2
(125MHz)
DCM
CLKIN CLK0
FB
BUFG
CLKDV
BUFG
userclk
(62.5MHz)