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Understanding timing reports for setup/hold timing, Devices other than virtex-4 or virtex-5, Virtex-4 or virtex-5 devices – Xilinx 1000BASE-X User Manual

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Ethernet 1000BASE-X PCS/PMA or SGMII v9.1

UG155 March 24, 2008

Chapter 12: Constraining the Core

R

INST "gmii_data_bus[6].delay_gmii_txd" IDELAY_VALUE = "33";

INST "gmii_data_bus[5].delay_gmii_txd" IDELAY_VALUE = "33";

INST "gmii_data_bus[4].delay_gmii_txd" IDELAY_VALUE = "33";

INST "gmii_data_bus[3].delay_gmii_txd" IDELAY_VALUE = "33";

INST "gmii_data_bus[2].delay_gmii_txd" IDELAY_VALUE = "33";

INST "gmii_data_bus[1].delay_gmii_txd" IDELAY_VALUE = "33";

INST "gmii_data_bus[0].delay_gmii_txd" IDELAY_VALUE = "33";

The value of

IDELAY_VALUE

for the gmii_tx_clk clock is preconfigured in the example

designs to meet the setup and hold constraints for the example GMII pinout in the
particular device. The setup/hold timing which is achieved after place-and-route is
reported in the datasheet section of the TRCE report (created by the implement script). See

“Understanding Timing Reports for Setup/Hold Timing.”

Understanding Timing Reports for Setup/Hold Timing

Devices Other Than Virtex-4 or Virtex-5

Setup and Hold results for the TBI or GMII input busses for the following devices are
defined in the Data Sheet Report section of the Timing Report: Virtex-II, Virtex-II Pro,
Spartan-3, Spartan-3E, Spartan-3A, Spartan-3AN, and Spartan-3A DSP. The results are self-
explanatory and show an obvious correlation and relationship to

Figure 12-2

and

Figure 12-3

.

The following example shows the GMII report from a Virtex-II device. The implementation
requires 1.531 ns of setup (this is less than the 2 ns required, to allow for slack). The
implementation requires -0.125 ns of hold (this is less than the 0 ns required, to allow for
slack).

Data Sheet report:

-----------------

All values displayed in nanoseconds (ns)

Setup/Hold to clock gmii_tx_clk

------------+------------+------------+------------------+--------+

| Setup to | Hold to | | Clock |

Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |

------------+------------+------------+------------------+--------+

gmii_tx_en | 1.531(R)| -0.141(R)|gmii_tx_clk_bufg | 0.000|

gmii_tx_er | 1.531(R)| -0.141(R)|gmii_tx_clk_bufg | 0.000|

gmii_txd<0> | 1.531(R)| -0.141(R)|gmii_tx_clk_bufg | 0.000|

gmii_txd<1> | 1.525(R)| -0.135(R)|gmii_tx_clk_bufg | 0.000|

gmii_txd<2> | 1.531(R)| -0.141(R)|gmii_tx_clk_bufg | 0.000|

gmii_txd<3> | 1.525(R)| -0.135(R)|gmii_tx_clk_bufg | 0.000|

gmii_txd<4> | 1.515(R)| -0.125(R)|gmii_tx_clk_bufg | 0.000|

gmii_txd<5> | 1.515(R)| -0.125(R)|gmii_tx_clk_bufg | 0.000|

gmii_txd<6> | 1.520(R)| -0.130(R)|gmii_tx_clk_bufg | 0.000|

gmii_txd<7> | 1.520(R)| -0.130(R)|gmii_tx_clk_bufg | 0.000|

------------+------------+------------+------------------+--------+

Virtex-4 or Virtex-5 Devices

Setup and hold results for the TBI or GMII input busses can be found in the data sheet
report section of the Timing Report. Note that initially, the results do not indicate an
obvious relationship to

Figure 12-2

and

Figure 12-3

. The following example shows the

GMII report from a Virtex-4 device.