Xilinx 1000BASE-X - Manual (Page 61)

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 61
UG155 March 24, 2008
Using the GMII as an Internal Connection R
10 Megabit per Second Frame Reception
The operation of the core remains unchanged. When operating at a speed of 10 Mbps,
every byte of the MAC frame (from destination address to the frame check sequence field,
inclusive) is repeated for 100 clock periods to achieve the desired bit rate. It is the
responsibility of the client logic (for example, an Ethernet MAC) to sample this data
correctly.
Using the GMII as an Internal Connection
The client-side GMII of the core may be used to connect to an internally integrated Media
Access Controller. For details, see
“Integrating with the 1-Gigabit Ethernet MAC Core,”
page 179 and “Integrating with the Tri-Mode Ethernet MAC Core,” page 185 .
Implementing External GMII
GMII Transmitter Logic
When implementing an external GMII, the GMII transmitter signals will be synchronous to
their own clock domain. The core must be used with a Transmitter Elastic Buffer to transfer
these GMII transmitter signals onto the cores internal 125 MHz reference clock (gtx_clk
when using the TBI; userclk2 when using the RocketIO transceiver). A Transmitter
Elastic Buffer is provided for the 1000BASE-X standard by the example design provided
with the core. See the Ethernet 1000BASE-X PCS/PMA or SGMII Getting Started Guide for
more information.