Texas Instruments TMS320DM357 - Manual (Page 134)

4.73 Transmit and Receive FIFO Register for Endpoint 0 (FIFO0)
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The Transmit and Receive FIFO Register for Endpoint 0 (FIFO0) is shown in Figure 88 and described in
Table 89 .
Figure 88. Transmit and Receive FIFO Register for Endpoint 0 (FIFO0)
31 0
DATA
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 89. Transmit and Receive FIFO Register for Endpoint 0 (FIFO0) Field Descriptions
Bit Field Value Description
31-0 DATA 0-FFFF FFFFh Writing to these addresses loads data into the Transmit FIFO for the corresponding endpoint.
Reading from these addresses unloads data from the Receive FIFO for the corresponding
endpoint.
Universal Serial Bus (USB) Controller 134 SPRUGH3 – November 2008
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