Index, Numerics – Avago Technologies LSI53C320 User Manual
Page 67

LSI53C320 Ultra320 SCSI Bus Expander Technical Manual
IX-1
Version 2.2
Copyright © 2003 by LSI Logic Corporation. All rights reserved.
Index
Numerics
272-ball plastic ball grid array
3-state
leakage
40 MHz oscillator
A
A_DIFFSENS
A_SACK
A_SATN
A_SBSY
A_SCD
,
A_SD[15:0]
A_SDP[1:0]
A_SIO
A_SMSG
A_SREQ
A_SRST
A_SSEL
absolute maximum stress ratings
AC characteristics
applications
attention signal
(SATN)
B
B_DIFFSENS
B_SACK
B_SATN
B_SBSY
B_SCD
B_SD[15:0]
B_SDP[1:0]
B_SIO
B_SMSG
B_SRST
B_SSEL
,
backward compatibility
bidirectional SCSI signals
block
BSY_LED
bus
timing
bus expander
busy
filters
busy control
SBSY
busy LED
C
cable length
calibration
CHIP_RESET/
CLOCK
clock
signal
skew control
clock signal
control signals
input
output
CRC
,
current
cyclic redundancy check
D
data
path
signal
data signal
DC characteristics
delay line structures
delay settings
device
differential
transceivers
DIFFSENS
LVD receivers
SCSI signal
distance requirements
–
,
domain validation
double transition clocking
drive strength
,
DT clocking
,
dynamic transmission mode
changing
E
EEPROM
,
electrical cable length
electrical characteristics
electrostatic discharge
enable/disable SCSI transfers
ESD