Figure4.6 lsi53c320 272-ball bga top view, Lsi53c320 272-ball bga top view, 12 specifications – Avago Technologies LSI53C320 User Manual
Page 54
4-12
Specifications
Version 2.2
Copyright © 2003 by LSI Logic Corporation. All rights reserved.
Figure 4.6
LSI53C320 272-Ball BGA Top View
1
1. The top view drawings provides the chip pinout from the top side of the chip.
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
VSS
SCSI
VDD
CORE
NC
TEST_3
NC
NC
WS_ENABLE/ XFER_ACTIVE
CLOCK
NC
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
A_SD11+
B_DIFFSENS
A_DIFFSENS
TEST_6
TEST_5
S_DATA
VSS
IO
NC
BSY_LED
VSS
CORE
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
A_SD9+
A_SD11-
VSS
CORE
NC
TEST_4
NC
S_CLK
VDD
IO
NC
CHIP_RESET/
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
A_SD9-
A_SD10+
A_SD10-
VSS
SCSI
NC
VDD
SCSI
NC
VSS
SCSI
NC
VDD
CORE
E1
E2
E3
E4
A_SIO+
A_SD8-
A_SD8+
NC
F1
F2
F3
F4
A_SREQ-
A_SREQ+
A_SIO-
VDD
SCSI
G1
G2
G3
G4
A_SSEL+
A_SCD-
A_SCD+
NC
H1
H2
H3
H4
A_SMSG-
A_SMSG+
A_SSEL-
VSS
SCSI
J1
J2
J3
J4
J9
J10
A_SACK+
A_SRST-
A_SRST+
NC
VSS
SCSI
VSS
SCSI
K1
K2
K3
K4
K9
K10
A_SBSY-
A_SACK-
A_SBSY+
VDD
SCSI
VSS
SCSI
VSS
SCSI
L1
L2
L3
L4
L9
L10
VSS
CORE
A_SATN+
A_SATN-
VDD
CORE
VSS
SCSI
VSS
SCSI
M1
M2
M3
M4
M9
M10
A_SDP0+
A_SDP0-
A_RBIAS
NC
VSS
SCSI
VSS
SCSI
N1
N2
N3
N4
A_SD7+
A_SD7-
A_SD6+
VSS
SCSI
P1
P2
P3
P4
A_SD6-
A_SD5+
A_SD4+
NC
R1
R2
R3
R4
A_SD5-
A_SD4-
A_SD3-
VDD
SCSI
T1
T2
T3
T4
A_SD3+
A_SD2+
A_SD1+
NC
U1
U2
U3
U4
U5
U6
U7
U8
U9
U10
A_SD2-
A_SD1-
A_SD0-
VSS
SCSI
NC
VDD
SCSI
NC
VSS
SCSI
NC
VDD
SCSI
V1
V2
V3
V4
V5
V6
V7
V8
V9
V10
A_SD0+
A_SDP1+
NC
A_SD14-
A_SD12+
NC
NC
NC
NC
NC
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
A_SDP1-
VDD
CORE
A_SD15+
A_SD14+
A_SD12-
NC
NC
NC
NC
NC
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
VSS
CORE
A_SD15-
A_SD13+
A_SD13-
NC
NC
NC
NC
NC
NC