Avago Technologies LSI53C320 - Manual (Page 57)

Chip Drawings 4-15
Version 2.2 Copyright © 2003 by LSI Logic Corporation. All rights reserved.
Table 4.14 Pin List by BGA Position
V9 NC
V10 NC
V11 NC
V12 NC
V13 NC
V14 NC
V15 NC
V16 NC
V17 NC
V18 NC
V19 NC
V20 NC
W1 A_SDP1-
W2 VDD
CORE
W3 A_SD15+
W4 A_SD14+
W5 A_SD12-
W6 NC
W7 NC
W8 NC
W9 NC
W10 NC
W11 NC
W12 NC
W13 NC
W14 NC
W15 NC
W16 NC
W17 NC
W18 NC
W19 VDD
CORE
W20 NC
Y1 VSS
CORE
Y2 A_SD15-
Y3 A_SD13+
Y4 A_SD13-
Y5 NC
Y6 NC
Y7 NC
Y8 NC
Y9 NC
Y10 NC
Y11 VSS
CORE
Y12 NC
Y13 NC
Y14 NC
Y15 NC
Y16 NC
Y17 NC
Y18 NC
Y19 NC
Y20 VSS
CORE
Pin Signal Pin Signal
A1 VSS
SCSI
A2 VDD
CORE
A3 NC
A4 TEST_3
A5 NC
A6 NC
A7 WS_ENABLE/
A8 XFER_ACTIVE
A9 CLOCK
A10 NC
A11 B_SD12-
A12 B_SD13+
A13 B_SD15-
A14 B_SDP1+
A15 B_SD1-
A16 B_SD2+
A17 B_SD4-
A18 B_SD4+
A19 B_SD6+
A20 VSS
CORE
B1 A_SD11+
B2 B_DIFFSENS
B3 A_DIFFSENS
B4 TEST_6
B5 TEST_5
B6 S_DATA
B7 VSS
IO
B8 NC
B9 BSY_LED
B10 VSS
CORE
B11 B_SD13-
B12 B_SD14-
B13 B_SD15+
B14 B_SD0-
B15 B_SD1+
B16 B_SD3-
B17 B_SD5+
B18 B_SD6-
B19 VDD
CORE
B20 B_SD7-
C1 A_SD9+
C2 A_SD11-
C3 VSS
CORE
C4 NC
C5 TEST_4
C6 NC
C7 S_CLK
C8 VDD
IO
C9 NC
C10 CHIP_RESET/
C11 B_SD12+
C12 B_SD14+
C13 B_SDP1-
C14 B_SD0+
C15 B_SD2-
C16 B_SD3+
C17 B_SD5-
C18 NC
C19 B_SD7+
C20 B_SDP0-
D1 A_SD9-
D2 A_SD10+
D3 A_SD10-
D4 VSS
SCSI
D5 NC
D6 VDD
SCSI
D7 NC
D8 VSS
SCSI
D9 NC
D10 VDD
CORE
D11 VDD
SCSI
D12 NC
D13 VSS
SCSI
D14 NC
D15 VDD
SCSI
D16 NC
D17 VSS
SCSI
D18 B_RBIAS
D19 B_SDP0+
D20 B_SATN+
E1 A_SIO+
E2 A_SD8-
E3 A_SD8+
E4 NC
E17 NC
E18 B_SATN-
E19 B_SBSY-
E20 B_SACK-
F1 A_SREQ-
F2 A_SREQ+
F3 A_SIO-
F4 VDD
SCSI
F17 VDD
SCSI
F18 B_SBSY+
F19 B_SACK+
F20 B_SRST+
G1 A_SSEL+
G2 A_SCD-
G3 A_SCD+
G4 NC
G17 NC
G18 B_SRST-
G19 B_SMSG-
G20 B_SMSG+
H1 A_SMSG-
H2 A_SMSG+
H3 A_SSEL-
H4 VSS
SCSI
H17 VSS
SCSI
H18 B_SSEL-
H19 B_SSEL+
H20 B_SCD-
J1 A_SACK+
J2 A_SRST-
J3 A_SRST+
J4 NC
J9 VSS
SCSI
J10 VSS
SCSI
J11 VSS
SCSI
J12 VSS
SCSI
J17 NC
J18 B_SCD+
J19 B_SREQ-
J20 B_SREQ+
K1 A_SBSY-
K2 A_SACK-
K3 A_SBSY+
K4 VDD
SCSI
K9 VSS
SCSI
K10 VSS
SCSI
K11 VSS
SCSI
K12 VSS
SCSI
K17 VDD
CORE
K18 B_SIO-
K19 B_SIO+
K20 VSS
CORE
L1 VSS
CORE
L2 A_SATN+
L3 A_SATN-
L4 VDD
CORE
L9 VSS
SCSI
L10 VSS
SCSI
L11 VSS
SCSI
L12 VSS
SCSI
L17 VDD
SCSI
L18 B_SD8+
L19 B_SD9-
L20 B_SD8-
M1 A_SDP0+
M2 A_SDP0-
M3 A_RBIAS
M4 NC
M9 VSS
SCSI
M10 VSS
SCSI
M11 VSS
SCSI
M12 VSS
SCSI
M17 NC
M18 B_SD10+
M19 B_SD10-
M20 B_SD9+
N1 A_SD7+
N2 A_SD7-
N3 A_SD6+
N4 VSS
SCSI
N17 VSS
SCSI
N18 NC
N19 B_SD11+
N20 B_SD11-
P1 A_SD6-
P2 A_SD5+
P3 A_SD4+
P4 NC
P17 NC
P18 NC
P19 NC
P20 NC
R1 A_SD5-
R2 A_SD4-
R3 A_SD3-
R4 VDD
SCSI
R17 VDD
SCSI
R18 NC
R19 NC
R20 NC
T1 A_SD3+
T2 A_SD2+
T3 A_SD1+
T4 NC
T17 NC
T18 NC
T19 NC
T20 NC
U1 A_SD2-
U2 A_SD1-
U3 A_SD0-
U4 VSS
SCSI
U5 NC
U6 VDD
SCSI
U7 NC
U8 VSS
SCSI
U9 NC
U10 VDD
SCSI
U11 VDD
CORE
U12 NC
U13 VSS
SCSI
U14 NC
U15 VDD
SCSI
U16 NC
U17 VSS
SCSI
U18 NC
U19 NC
U20 NC
V1 A_SD0+
V2 A_SDP1+
V3 NC
V4 A_SD14-
V5 A_SD12+
V6 NC
V7 NC
V8 NC
Pin Signal Pin Signal Pin Signal