Avago Technologies LSI53C320 - Manual (Page 49)

Electrical Characteristics 4-7
Version 2.2 Copyright © 2003 by LSI Logic Corporation. All rights reserved.
Figure 4.3 Rise and Fall Time Test Conditions
4.1.3 AC Characteristics
The AC characteristics described in this section apply over the entire
range of operating conditions. Chip timing is based on simulation at worst
case voltage, temperature, and processing. The LSI53C320 requires a
40 MHz clock input.
Table 4.12 and Figure 4.4 provide clock timing data.
dV
L
/dt Slew rate, HIGH to LOW 0.15 0.50 V/ns Refer to Figure 4.3
ESD Electrostatic discharge 2 – kV MIL-STD-883C; 3015-7
Latch-up 100 – mA –
Filter delay 20 30 ns –
Ultra filter delay 10 15 ns –
Extended filter delay 40 60 ns –
1. Active negation outputs only: Data, Parity, SREQ/, and SACK/. SCSI SE mode only (minus signals).
2. Single pin only; irreversible damage may occur if sustained for one second.
3. SCSI RESET pin has a 10 k
Ω
pull-up resistor.
Table 4.11 TolerANT Technology Electrical Characteristics (Cont.)
Symbol Parameter Min Max Units Test Conditions
20 pF
47
Ω
2.5 V
+
−