Avago Technologies LSI53C320 - Manual (Page 30)

2-12 Functional Descriptions
Version 2.2 Copyright © 2003 by LSI Logic Corporation. All rights reserved.
to the other bus. When both buses assert SSEL simultaneously, A_SSEL
takes precedence over B_SSEL. The SSEL output has a pull-down
control for an open collector driver. The following steps describe the
select control signal process:
1. If the LSI53C320 is driving the SSEL signal, the LSI53C320 blocks
the SSEL input signal on the other bus.
2. The LSI53C320 filters the leading edge of the SSEL signal to ensure
that the output does not switch for a specified time after the leading
edge. The duration of the input signal determines the duration of the
output signal.
3. To assure that the LSI53C320 does not sample its own signals, the
LSI53C320 delays sampling until a specified time after the last signal
deassertion.
2.3.3 Busy Signal
The controller propagates the A_SBSY and B_SBSY signals from the
source bus to the load bus. The following steps describe the busy control
signal process:
1. The LSI53C320 filters the leading edge of the SBSY signal. The
LSI53C320 holds the assertion edge for a specified time to prevent
signal bounce. The duration of the input signal determines the
duration of the output signal.
2. To assure that the LSI53C320 does not sample its own signals, the
LSI53C320 delays sampling until a specified time after the last signal
deassertion.
2.3.4 Reset Signal
The controller passes the A_SRST and B_SRST signals from the source
to the load bus. This output has pull-down control for an open collector
driver. The following steps describe the processing of the reset signals:
1. If the LSI53C320 is driving the SRST signal, the LSI53C320 blocks
the SRST input signal on the other bus.
2. The LSI53C320 filters the leading edge of the signal to ensure that
the output does not switch during a specified time after the leading