Avago Technologies LSI53C320 - Manual (Page 56)

4-14 Specifications
Version 2.2 Copyright © 2003 by LSI Logic Corporation. All rights reserved.
Table 4.13 Pin List by Signal Name
VDD
SCSI
D6
VDD
SCSI
D11
VDD
SCSI
D15
VDD
SCSI
F4
VDD
SCSI
F17
VDD
SCSI
K4
VDD
SCSI
L17
VDD
SCSI
R4
VDD
SCSI
R17
VDD
SCSI
U6
VDD
SCSI
U10
VDD
SCSI
U15
VSS
CORE
A20
VSS
CORE
B10
VSS
CORE
C3
VSS
CORE
K20
VSS
CORE
L1
VSS
CORE
Y1
VSS
CORE
Y11
VSS
CORE
Y20
VSS
IO
B7
VSS
SCSI
A1
VSS
SCSI
D4
VSS
SCSI
D8
VSS
SCSI
D13
VSS
SCSI
D17
VSS
SCSI
H4
VSS
SCSI
H17
VSS
SCSI
J9
VSS
SCSI
J10
VSS
SCSI
J11
VSS
SCSI
J12
VSS
SCSI
K9
VSS
SCSI
K10
VSS
SCSI
K11
VSS
SCSI
K12
VSS
SCSI
L9
VSS
SCSI
L10
VSS
SCSI
L11
VSS
SCSI
L12
VSS
SCSI
M9
VSS
SCSI
M10
VSS
SCSI
M11
VSS
SCSI
M12
VSS
SCSI
N4
VSS
SCSI
N17
VSS
SCSI
U4
VSS
SCSI
U8
VSS
SCSI
U13
VSS
SCSI
U17
WS_ENABLE/ A7
XFER_ACTIVE A8
Signal Pin Signal Pin
A_DIFFSENS B3
A_RBIAS
M3
A_SACK+ J1
A_SACK- K2
A_SATN+ L2
A_SATN- L3
A_SBSY+ K3
A_SBSY- K1
A_SCD+ G3
A_SCD- G2
A_SD0+ V1
A_SD0- U3
A_SD1+ T3
A_SD1- U2
A_SD10+ D2
A_SD10- D3
A_SD11+ B1
A_SD11- C2
A_SD12+ V5
A_SD12- W5
A_SD13+ Y3
A_SD13- Y4
A_SD14+ W4
A_SD14- V4
A_SD15+ W3
A_SD15- Y2
A_SD2+ T2
A_SD2- U1
A_SD3+ T1
A_SD3- R3
A_SD4+ P3
A_SD4- R2
A_SD5+ P2
A_SD5- R1
A_SD6+ N3
A_SD6- P1
A_SD7+ N1
A_SD7- N2
A_SD8+ E3
A_SD8- E2
A_SD9+ C1
A_SD9- D1
A_SDP0+ M1
A_SDP0- M2
A_SDP1+ V2
A_SDP1- W1
A_SIO+ E1
A_SIO- F3
A_SMSG+ H2
A_SMSG- H1
A_SREQ+ F2
A_SREQ- F1
A_SRST+ J3
A_SRST- J2
A_SSEL+ G1
A_SSEL- H3
B_DIFFSENS B2
B_RBIAS
D18
B_SACK+ F19
B_SACK- E20
B_SATN+ D20
B_SATN- E18
B_SBSY+ F18
B_SBSY- E19
B_SCD+ J18
B_SCD- H20
B_SD0+ C14
B_SD0- B14
B_SD1+ B15
B_SD1- A15
B_SD10+ M18
B_SD10- M19
B_SD11+ N19
B_SD11- N20
B_SD12+ C11
B_SD12- A11
B_SD13+ A12
B_SD13- B11
B_SD14+ C12
B_SD14- B12
B_SD15+ B13
B_SD15- A13
B_SD2+ A16
B_SD2- C15
B_SD3+ C16
B_SD3- B16
B_SD4+ A18
B_SD4- A17
B_SD5+ B17
B_SD5- C17
B_SD6+ A19
B_SD6- B18
B_SD7+ C19
B_SD7- B20
B_SD8+ L18
B_SD8- L20
B_SD9+ M20
B_SD9- L19
B_SDP0+ D19
B_SDP0- C20
B_SDP1+ A14
B_SDP1- C13
B_SIO+ K19
B_SIO- K18
B_SMSG+ G20
B_SMSG- G19
B_SREQ+ J20
B_SREQ- J19
B_SRST+ F20
B_SRST- G18
B_SSEL+ H19
B_SSEL- H18
BSY_LED B9
CHIP_RESET/ C10
CLOCK
A9
NC A3
NC A5
NC A6
NC A10
NC B8
NC C4
NC C6
NC C9
NC C18
NC D5
NC D7
NC D9
NC D12
NC D14
NC D16
NC E4
NC E17
NC G4
NC G17
NC J4
NC J17
NC M4
NC M17
NC N18
NC P4
NC P17
NC P18
NC P19
NC P20
NC R18
NC R19
NC R20
NC T4
NC T17
NC T18
NC T19
NC T20
NC U5
NC U7
NC U9
NC U12
NC U14
NC U16
NC U18
NC U19
NC U20
NC V3
NC V6
NC V7
NC V8
NC V9
NC V10
NC V11
NC V12
NC V13
NC V14
NC V15
NC V16
NC V17
NC V18
NC V19
NC V20
NC W6
NC W7
NC W8
NC W9
NC W10
NC W11
NC W12
NC W13
NC W14
NC W15
NC W16
NC W17
NC W18
NC W20
NC Y5
NC Y6
NC Y7
NC Y8
NC Y9
NC Y10
NC Y12
NC Y13
NC Y14
NC Y15
NC Y16
NC Y17
NC Y18
NC Y19
S_CLK C7
S_DATA B6
TEST_3 A4
TEST_4 C5
TEST_5 B5
TEST_6 B4
VDD
CORE
A2
VDD
CORE
B19
VDD
CORE
D10
VDD
CORE
K17
VDD
CORE
L4
VDD
CORE
U11
VDD
CORE
W2
VDD
CORE
W19
VDD
IO
C8
Signal Pin Signal Pin Signal Pin