Sundance SMT310Q - Manual (Page 46)

Version 2.1 Page 46 of 55 SMT310Q User Manual
14. JTAG Interface circuits
The buffered JTAG circuit on the SMT310Q allows connection between SMT310Q
cards and other compatible carrier modules. This section describes the JTAG
interfacing circuitry to customers custom-built slave devices.
14.1
Signal Description
Signal Description
TDI JTAG Test Data In. The master device drives this signal.
TDO JTAG Test Data Out. The slave device drives this signal.
TMS Test Mode Select. Driven by the master device.
TCK JTAG Clock. Driven by the master
TCK_RET JTAG Clock Return, driven by the slave.
/TRST JTAG Reset, driven by the master.
/RESET Board Reset. Driven my master. (Unused on SMT310Q)
PD Pod Detect signal.
This signal should be connected 3.3V or 5V on the slave device to indicate to the
master that an external device is present.
/DETECT A master pulls this signal to GND. If connecting two SMT310Q together a jumper is
used on one of the carriers (switching it to slave mode) to prevent two masters being
connected together.
CONFIG This signal is unused and should be left unconnected.
EMU0,EMU1 These are open collector JTAG emulation pins and should be connected to the DSP.
Pull-up resistors are required.
Table 20: JTAG signals