Sundance SMT310Q - Manual (Page 42)

Version 2.1 Page 42 of 55 SMT310Q User Manual
When the SMT310Q is configured as a Master, using the Buffered JTAG
connector to connect to a JTAG slave, the buffered connector pins are used as
follows:
Pin Signal Direction Description
1 TDI OUT JTAG data out
2 GND
3 TDO IN JTAG data in
4 GND
5 TMS OUT JTAG Test mode select
6 GND
7 TCK OUT JTAG clock 10MHz
8 GND
9 TCK_RET IN JTAG clock return
10 GND
11 /TRST OUT JTAG Reset
12 GND
13 /RESET OUT Board Reset out
14 PD IN Presence detect when pulled high
15 /DETECT OUT Detect external JTAG controller when grounded
16 CONFIG OPEN COLL Global open collector C4x CONFIG
17 EMU0 IN Buffered EMU0 output
18 EMU1 IN Buffered EMU1 output
19 SPARE1
20 SPARE2
Table 15: Buffered JTAG connector pin functionality as JTAG master