Table 1: com-switch register, Bit clear (0) set (1) bit clear (0) set (1) – Sundance SMT310Q User Manual
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SMT310Q User Manual
D15
D14
D13
D12
PCI-External
T1C3—C_BUF
T3C3-T4C0
T3C2-T4C5
T3C1-T4C4
D11
D10
D9
D8
T2C3-T3C0 T2C2-T3C5
T2C1-T3C4
T1C3-T2C0
D7
D6
D5
D4
T1C2-T2C5 T1C1-T2C4
C-T1C0 B-T1C5
D3
D2
D1
D0
A-T1C4 T4C3-C
T4C2-B
T4C1-A
Table 1: COM-SWITCH Register
Bit
Clear (0)
Set (1)
Bit
Clear (0)
Set (1)
D0 T4C1—FMS
T4C1—T1C4
(Requires D3 set)
D8
T1C3—FMS
T2C0—FMS
T1C3—T2C0
D1 T4C2—FMS
T4C2—T1C5
(Requires D4 set)
D9
T2C1—FMS
T3C4—FMS
T2C1—T3C4
D2 T4C3—FMS
T4C3—T1C0
(Requires D5 set)
D10
T2C2—FMS
T3C5—FMS
T2C2—T3C5
D3 T1C4—FMS
T1C4—T4C1
(Requires D0 set)
D11
T2C3—FMS
T3C0—FMS
T2C3—T3C0
D4 T1C5—FMS
T1C5—T4C2
(Requires D1 set)
D12
T3C1—FMS
T4C4—FMS
T3C1—T4C4
D5 T1C0—FMS
T1C0—T4C3
(Requires D2 set)
D13
T3C2—FMS
T4C5—FMS
T3C2—T4C5
D6
T1C1—FMS
T2C4—FMS
T1C1—T2C4 D14 T3C3—FMS T3C3—T4C0
D7
T1C2—FMS
T2C5—FMS
T1C2—T2C5 D15
PCI—T1C3
C_BUF—External
Buffered Comport
PCI— External
Buffered Comport
T1C3—C_BUF