1 intreg register (bar1, offset 4016), Intreg register (bar1, offset 40 – Sundance SMT310Q User Manual
Page 31

Version 2.1
Page 31 of 55
SMT310Q User Manual
Details of these registers can be found in the V363EPC Local Bus PCI Bridge
User Manual:
(
)
Other Registers
Control Register (BAR1, Offset 1416, WRITE-ONLY)
Interrupt Control Register (BAR1, Offset 1816)
INTREG Register (BAR1, Offset 4016)
8.3.1 INTREG Register (BAR1, Offset 40
16
)
Bits
Name
Description
15 -
Reserved
14 -
Reserved
13 -
Reserved
12 -
Reserved
11 -
Reserved
10 -
Reserved
9 -
Reserved
8 -
Reserved
7 -
Reserved
6 -
Reserved
5 -
Reserved
4 -
Reserved
3 -
Reserved
2
IIOF2EN
PC to DSP TIMIIOF2 interrupt enable
1
IIOF1EN
PC to DSP TIMIIOF1 interrupt enable
0
IIOF0EN
PC to DSP TIMIIOF0 interrupt enable
Table 7: INTREG Register