Measurement Computing ADAC/5500 Series User Manual

Page 50

6.2.3

D/A Outputs (-V Option only) - ADAC/5501MF and ADAC/5502MF

Number of Outputs:

2 (optional) Clocked DACs

Resolution:

16 bit (152.870 µV/bit on 0 to 10 V range)

D/A Full Scale Range:

±10 V, 0 to 10 V

Settling time to 0.006% of FSR:

10 µsec for 20 V step

Differential Linearity:

± 0.25 LSB @ 25° guaranteed monotonic

Relative Accuracy

Bipolar:

± 2 LSB typ.

Unipolar:

± 4 LSB typ.

Gain Error:

Adjustable to zero

Zero Error:

Adjustable to zero

Data Coding:

Unipolar:

Straight binary

Bipolar:

Offset binary 2's complement

Data Format:

16 bit right justified

Data Storage:

FIFO

DAC Clock Update Source:

- Software Pacer
- Internal Pacer
- External TTL

DAC Triggering:

- Software Trigger
- External Trigger TTL
- Software Gate
- External Gate

Output Current:

±5mA

Total Harmonic Distortion:

Not specified, DACs for DC level only

ADAC Series

908196

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ADAC/5500 Series User’s Manual