Measurement Computing ADAC/5500 Series - Manual (Page 26)

ADAC Series PCI Boards 795 - 21 - ADAC/5500 Series User Manual
CNTR1 - This is the general purpose Counter 1 clock input. This input recognizes TTL level signals
and is rising edge sensitive. The input clock rate cannot exceed 500 kHz. The clock source must
provide a minimum pulse width of 100 ns.
The COUNTER 1’s External Clock Input line (CNTR1) is shared with the DAC’s
External Clock Input signal (DACLKIN) pin #40 on the 68-pin J1 connector.
Therefore only one input signal may be connected to the DACLKIN / CNTR1
terminal at any given time. Attempting to use COUNTER 1 when the ADC Pacer
Clock Source is set for an External Clock Input would not be possible, unless
COUNTER 1 was being used to count the DAC’s External Clock Input signal.
TIMER0 - This LSTTL output signal provides a 50% duty cycle square wave derived from an
independent TMR0 internal software pacer clock. The pacer clock period can be set from 1 us to
65535 us, producing an output clock rate from 500 KHz down to approximately 7.6295 Hz.
The TIMER 0’s External Clock Output line (TMR0) is shared with the ADC’s
External Trigger Output signal (ADTGOUT) pin #4 on the 68-pin J1 connector.
Therefore only one output signal may be generated to the ADTGOUT / TMR0
terminal at any given time. TIMER 0 is automatically disabled in hardware when
the ADC’s External Trigger Output is enabled.
TIMER1 - This LSTTL output signal provides a 2nd clock source, with characteristics identical to
TIMER0, using a separate, independent, TMR1 internal software pacer clock.
The TIMER 1’s External Clock Output line (TMR1) is shared with the ADC’s
External Clock Output signal (ADCLKOUT) pin #5 on the 68-pin J1 connector.
Therefore only one output signal may be generated to the ADCLKOUT / TMR1
terminal at any given time. TIMER 1 is automatically disabled in hardware when
the ADC’s External Clock Output is enabled.
4.2.1.6 Ground Lines
SGND - This signal is the reference ground used for A/D conversions. If you are measuring from a
fully floating source in differential mode, it would be beneficial to tie one of the channel inputs to this
point. This signal should not be used for sinking large amounts of current. This signal also acts as the
common reference line when the board is configured for single-ended inputs.
PDIN - This signal is the common return line used when the board is configured for pseudo
differential input mode.
AGND - This signal is the power return for the ±15 V power supply lines. It is distinguished from the
DGND line because it generally helps separate the potentially high frequency digital ground noise
from the analog circuits that are powered by ±15 V.
DGND - This signal is the +5 V power return line. It is generally noisier than AGND and is a good
logic low reference point.
4.2.1.7 Power Lines
+15 V, -15 V - This power is only intended to power the optional terminal panels with active
circuitry on them. These voltages are supplied by one of the on-board DC/DC converters.
Approximately
±30 mA are available on these lines. Both lines are fused
@ 125 mA.
+5 V - This signal is sourced directly from the PCI Bus. Take great care when using this power.
These lines are fused @ 3 Amps.
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