Altera Cyclone II EP2C35 PCI Development Board User Manual
Page 38

4–4
Core Version 4.0.0
Altera Corporation
Cyclone II EP2C35 PCI Development Board Reference Manual
May 2005
PCI & PCI-X Bus Interfaces
shows the PCI system configuration signals.
PCI_AD45
B81
F25
LPCI_AD45
PCI_AD46
A80
F26
LPCI_AD46
PCI_AD47
B80
G21
LPCI_AD47
PCI_AD48
A79
G22
LPCI_AD48
PCI_AD49
B78
G23
LPCI_AD49
PCI_AD50
A77
G26
LPCI_AD50
PCI_AD51
B77
H23
LPCI_AD51
PCI_AD52
A76
H25
LPCI_AD52
PCI_AD53
B75
H26
LPCI_AD53
PCI_AD54
A74
J20
LPCI_AD54
PCI_AD55
B74
J21
LPCI_AD55
PCI_AD56
A73
J23
LPCI_AD56
PCI_AD57
B72
J24
LPCI_AD57
PCI_AD58
A71
J25
LPCI_AD58
PCI_AD59
B71
J26
LPCI_AD59
PCI_AD60
A70
K22
LPCI_AD60
PCI_AD61
B69
K23
LPCI_AD61
PCI_AD62
A68
K25
LPCI_AD62
PCI_AD63
B68
K26
LPCI_AD63
Table 4–1. PCI Signals & Connections (Part 4 of 4)
PCI Signal
PCI Connector
(J13)
Cyclone II Pin
(U9)
Local Signal
Table 4–2. PCI System Configuration Signals
Board Reference
Board Settings DIP
Switch Bank
Positions (S4)
PCI Signal
PCI Connector
(J13)
Attribute
PCI SPD
Switch S4, position 3
PCI_M66EN
B49
Ground
PCI Mode
Switch S4, position 1
PCI_XCAP
B38
Ground
PCI XSPD
Switch S4, position 2
10-K
Ω resistor to ground
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)