Altera Cyclone II EP2C35 PCI Development Board User Manual
Page 36
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4–2
Core Version 4.0.0
Altera Corporation
Cyclone II EP2C35 PCI Development Board Reference Manual
May 2005
PCI & PCI-X Bus Interfaces
PCI_REQn
B18
N20
LPCI_REQn
PCI_REQ64n
A60
V26
LPCI_REQ64n
PCI_GNTn
A17
M24
LPCI_GNTn
PCI_ACK64n
B60
V25
LPCI_ACK64n
PCI_FRAMEn
A34
N24
LPCI_FRAMEn
PCI_DEVSELn
B37
R25
LPCI_DEVSELn
PCI_IRDYn
B35
P23
LPCI_IRDYn
PCI_TRDYn
A36
N23
LPCI_TRDYn
PCI_STOPn
A38
P24
LPCI_STOPn
PCI_PAR
A43
T20
LPCI_PAR
PCI_PAR64
A67
U26
LPCI_PAR64
PCI_PERRn
B40
U24
LPCI_PERRn
PCI_SERRn
B42
U23
LPCI_SERRn
PCI_CBEn0
A52
R20
LPCI_CBEn0
PCI_CBEn1
B44
T22
LPCI_CBEn1
PCI_CBEn2
B33
T24
LPCI_CBEn2
PCI_CBEn3
B26
T25
LPCI_CBEn3
PCI_CBEn4
B66
U20
LPCI_CBEn4
PCI_CBEn5
A65
U21
LPCI_CBEn5
PCI_CBEn6
B65
V24
LPCI_CBEn6
PCI_CBEn7
A64
V23
LPCI_CBEn7
PCI_AD0
A58
L20
LPCI_AD0
PCI_AD1
B58
L21
LPCI_AD1
PCI_AD2
A57
L24
LPCI_AD2
PCI_AD3
B56
L25
LPCI_AD3
PCI_AD4
A55
M19
LPCI_AD4
PCI_AD5
B55
M22
LPCI_AD5
PCI_AD6
A54
M23
LPCI_AD6
PCI_AD7
B53
R24
LPCI_AD7
PCI_AD8
B52
U22
LPCI_AD8
PCI_AD9
A49
U25
LPCI_AD9
PCI_AD10
B48
W21
LPCI_AD10
PCI_AD11
A47
W23
LPCI_AD11
Table 4–1. PCI Signals & Connections (Part 2 of 4)
PCI Signal
PCI Connector
(J13)
Cyclone II Pin
(U9)
Local Signal
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)