Ahdl function prototype, Instruction, use the following instruction format, Is an array of zeros – Altera Virtual JTAG IP Core User Manual
Page 33: Is the concatenation operator, m is the width of, And n is the width of the
Figure 16: Functional Model Interaction between USER1 DR CHAIN and SLD Node VIRs
TDI
TDO
ADDR[n - 1..0]
VIR_value
msb
lsb
ADDR[n - 1..0]
ADDR[n - 1..0]
SLD
NODE
1
VIR
SLD
NODE
2
VIR
SLD
NODE
N
VIR
USER1 DR
SLD Nodes
To form the
VIR_CAPTURE
instruction, use the following instruction format:
VIR_CAPTURE = ZERO [ (m – 4)..0] ## ADDR [(n – 1)..0] ## 011
In this format,
ZERO[]
is an array of zeros,
##
is the concatenation operator, m is the width of
VIR_VALUE
,
and n is the width of the
ADDR
bit.
AHDL Function Prototype
The following AHDL function prototype is located in the sld_virtual_jtag.inc file in the <Quartus II
installation directory> \libraries\megafunctions directory.
Port name and order also apply to Verilog HDL.
Note:
FUNCTION sld_virtual_jtag(
ir_out[sld_ir_width-1..0],
tdo
)
WITH(
lpm_hint,
lpm_type,
sld_auto_instance_index,
sld_instance_index,
sld_ir_width,
sld_sim_action,
sld_sim_n_scan,
sld_sim_total_length
)
RETURNS(
ir_in[sld_ir_width-1..0],
jtag_state_cdr,
Altera Corporation
Virtual JTAG Megafunction (sld_virtual_jtag)
33
AHDL Function Prototype
UG-SLDVRTL
2014.03.19