Altera FIR Compiler II MegaCore Function - Manual (Page 44)

Signal Direction Width Description
coeff_in_address
Input Number of
coefficients
Address input to write new coefficient data.
coeff_in_we
Input 1 Write enable for memory-mapped coefficients.
coeff_in_data
Input Coefficient
width
Data coefficient input.
coeff_out_valid
Output 1 Coefficient read valid signal.
coeff_out_data
Output Coefficient
width
Data coefficient output. The coefficient in memory at
the address specified by
coeff_in_address
.
FIR II IP Core Time-Division Multiplexing
The FIR II IP core optimizes hardware utilization by using time-division multiplexing (TDM). The TDM
factor (or folding factor) is the ratio of the clock rate to the sample rate.
By clocking a FIR II IP core faster than the sample rate, you can reuse the same hardware. For example, by
implementing a filter with a TDM factor of 2 and an internal clock multiplied by 2, you can halve the
required hardware.
Figure 4-8: Time-Division Multiplexing to Save Hardware Resources
Clock Rate = Sample Rate
Clock Rate = 2 x Sample Rate
Read
Read
Write
Write Serialize Deserialize
UG-01072
2014.12.15
FIR II IP Core Time-Division Multiplexing 4-11
FIR II IP Core Functional Description Altera Corporation
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