Altera 50G Interlaken MegaCore Function User Manual
Page 89
Performance and Fmax Requirements for 40G
Ethernet Traffic
A
2015.05.04
UG-01140
To achieve 40G Ethernet line rates through the application interface of your 50G Interlaken IP core, you
must run the transmit side and receiver side user interface clocks
tx_usr_clk
and
rx_usr_clk
at a
minimum frequency of 200 MHz.
The following discussion describes the packet rate calculation that supports this requirement.
Figure A-1: Interlaken Ethernet Packet
To transmit a minimum size (64-byte) Ethernet packet, the Interlaken link transmitter must send 672 bits
of data.
Preamble
8 Bytes
Minimum Packet
64 Bytes
Interpacket Gap
12 Bytes
672 Bits
To support an Ethernet line rate of 40Gb/s, the Interlaken link must process 400 bits in 10ns. The
following calculation derives the required clock frequency.
40 x 1,000,000,000 bits/sec
..
672 = 59.5 million packets/sec
60 million packets/sec
This packet rate requires that the user interface handle one packet per two cycles if the operating clock
runs at 200 MHz.
The following figures explain the derivation of the minimum frequency requirements.
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