Altera 50G Interlaken MegaCore Function - Manual (Page 66)

Offset Name R/W Description
9'h25 CRC2 RO 4 bit counters indicating CRC errors in lanes
23,22,21,20,19,18,17,16.
These will saturate at F, and you clear them by setting bit 6
in the RESET register.
9'h27 SH_ERR RO [NUM_LANES–1:0] – Sticky flag indicating a sync header
(framing bit) error has occurred in the corresponding RX
lane since this bit was last cleared through the RESET
register.
9'h28
RX_LOA
RO Bit [0] – Sticky flag indicating loss of RX side lane-to-lane
alignment since this bit was last cleared through the RESET
register. Typically, the IP core asserts this bit in case of a
catastrophic problem such as one or more lanes going
down.
9'h29
TX_LOA
RO Bit [0] – Sticky flag indicating loss of TX side lane to lane
alignment since this bit was last cleared through the RESET
register. Typically, the IP core asserts this bit in case of a TX
FIFO underflow / overflow caused by a significant deviation
from the expected data flow rate through the TX PCS.
9'h30 PCS_6SEL RO Transceiver block selection for PCS test bus. (Factory use
only).
9'h31 PCS_LNSEL RO Lane selection within transceiver block for PCS test bus.
(Factory use only).
9'h32 PCS_TB RO PCS test bus. (Factory use only).
9'h33
Reserved
9'h34 RX_PRBS_DONE RO [NUM_LANES–1:0] – Indicates whether enough bits have
been received on the corresponding RX lane for one
complete pass through the PRBS polynomial.
9'h35 RX_PRBS_ERR RO [NUM_LANES–1:0] – Sticky flag that indicates whether a
PRBS error has occurred on the corresponding RX lane
after
RX_PRBS_DONE
has attained the value of 1.
9'h36 RX_PRBS_COUNT RO [7:0] – This eight-bit counter holds the number of words
that had PRBS errors across all lanes. Saturates at the value
of 0xFF.
9'h37 RX_PRBS_CTRL RW Bit [0] – If you set this bit to the value of 1, the IP core
clears the
RX_PRBS_DONE
,
RX_PRBS_ERR
, and
RX_PRBS_
COUNT
registers. Reset this bit to the value of 0 to capture
new PRBS status.
6-4 50G Interlaken IP Core Register Map
UG-01140
2015.05.04
Altera Corporation 50G Interlaken IP Core Register Map
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