Rockwell Automation 1734-VHSC24 Very High-Speed Counter Modules User Manual - Manual (Page 19)

Publication 1734-UM003B-EN-P - August 2005
About the Modules 1-9
New Data Indicator
A two-bit counter, C1 and C0, is updated every time an event occurs,
indicating that new data is available in the Stored/Accumulated Count
words. Events are defined as:
Any active gate transition in any of the Store Count (Counter or
Encoder) modes
The end of the gate sample period in either the Period / Rate,
Continuous / Rate or PWM modes
The end of the programmed sample period in the Rate
Measurement mode
To use these bits reliably, acquisition of data from the counter module
must occur faster than the events, which cause C1/C0 to increment.
When C1/C0 is updated, a change of state (COS) message can be sent.
Default Configuration
The module default configuration on startup are the following.
• Counter mode
• 50 Hz filter on A, B, and Z
• No time base
• Active Output Assembly = 105
• Rollover = 0x00FFFFFF
• Preset = 0
• No scalar
• Output 0 untied
• Output 1 untied
• Window comparators = 0
• Counter Control Safe State = 0
• Output Control Safe State = 0
To modify the default settings to those required for your application,
refer to the appropriate section of this publication.